Wandering Thoughts archives


My view on why CISC (well, x86) won over RISC in the end

One of Tanebaum's now-famous three predictions in the Tanenbaum/Torvalds debate was that x86 would die out and be replaced by RISC architectures. Some of you may be tempted to immediately laugh at this prediction, but before you do that you should remember the historical context; specifically, that this prediction was made in 1992. Back then this looked like a very good bet, one so good that Intel made it itself with the Itanium. RISC was everywhere, the x86 architecture was low end and not very well performing, and so on. So what happened on the way between 1992 and now?

In my view, there are two major reasons and one moderate reason why the x86 architecture has proven to be evergreen and why RISC never overtook it, especially traditional 1992-style RISC (note that ARM is not a 1992 style RISC).

The first reason is that people (vastly) underestimated how far x86 performance could be pushed with enough effort. I'm not sure if specialists in 1992 could have made a good prediction of future x86 performance, but certainly the general computing perception was that x86 performance and CISC performance in general were fundamentally limited by the complexity (and limitations) of the architecture. RISC was designed to go real fast, and CISC just wasn't.

The second reason is that people vastly underestimated how much money there would be in increasing x86 performance. Pushing x86 performance to its current heights has required absurdly large amounts of money; back in 1992 you had to be at least somewhat contrarian and open-minded to see that for various reasons x86 was going to have this huge amount available to improve it. I think it might have been possible to see the wave coming but it certainly was far from obvious or easy.

(Once again, note that even Intel missed this as late as 1994, when it started the whole Itanium dead end.)

The moderate reason is the issue of memory bandwidth and latency. Traditional RISC designs have larger instructions than x86 and need more of them to get the same amount of work done; this puts more pressure on caches and demands more memory bandwidth. Memory access speed was not seen as a big concern back in 1992, but it has become an increasingly important one since then and this favours architectures with compact instruction encodings (even if this results in them being far from regular and easy to decode).

(There is a more general argument that RISC was always a larger bet than it appeared, but that will take another entry.)

tech/Whyx86WonVsRISC written at 02:14:42; Add Comment

Page tools: See As Normal.
Login: Password:
Atom Syndication: Recent Pages, Recent Comments.

This dinky wiki is brought to you by the Insane Hackers Guild, Python sub-branch.